-- E. Phillips and D. Pugh

-- E. Phillips and D. Pugh

Part 1: Background

If we know what it was we were doing,
it would no be called research, would it?

-- Albert Einstein

Chapter 2 - Architecture Level Parallelism

The performance improvement to be gained from
using some faster mode of execution is limited by
the fraction of the time the faster mode can be used.

-- Amdahl's Law

Chapter 3 - Multithreaded Processors

Computing is similar to cookery. Programs, like recipes, are lists of
instructions to be carried out. The raw materials, like ingredients,
are data which must be sliced & diced in exactly the right way, and
turned into palatable output as quickly as possible

-- The Economist, April 19th 2001

So you can find the hidden doors to places no one's been before
and the pride you'll feel inside is not the kind that makes you fall,
it's the kind that recognises... the bigness found in being small.

-- A. A. Milne

Part 2: Architectural Design

Chapter 5 - System Overview

One must learn by doing the thing,
for though you think you know it,
you have no certainty until you try.

-- Aristotle

Chapter 6 - Hardware Architecture

Two roads diverged in a wood, and I -
I took the one less travelled by,
and that has made all the difference.

-- Robert Frost

Daring ideas are like chessmen moved forward;
they may be defeated, but they start a winning game.

-- Johann Wolfgang von Goethe

Part 3: Evaluation and Conclusions

Chapter 8 - Evaluation and Results

All that we are is the result of
what we have thought.

-- Buddha

Chapter 9 - Conclusions and Future Directions

The day of work is done.
Hide my face in your arms, mother.
Let me dream.

-- Rabindranath Tagore

Official Page: EPSRC Multithreaded Embedded Processor Project

Presentations: First Year | Poster | Hardware Discussion | Cambridge-MIT Workshop

• ICCD2002 Conference: Long Paper | Shot Paper | Presentation

@inproceedings{Watcharawitch02,
  author = {Panit Watcharawitch and Simon W. Moore},
  title = {JMA: The Java-Multithreading Architecture for Embedded Processors},
  booktitle = {International Conference on Computer Design (ICCD)},
  publisher = {the IEEE Computer Society},
  month = {September},
  year = {2002}
}

• Cool Chip IV Conference: Paper | Presentation

@inproceedings{Watcharawitch03a,
  author = {Panit Watcharawitch and Simon W. Moore},
  title = {MulTEP: The Multithreading Embedded Processors},
  booktitle = {An International Symposium on Low-Power and High-Speed Chips (Cool Chips) IV},
  publisher = {the IEEE/IEICE/IPSJ/ACM SIGARCH Computer Society},
  volume = {I},
  month = {April},
  year = {2003}
}

• IEE SoC Conference: Paper | Presentation

@inproceedings{Watcharawitch03b,
  author = {Panit Watcharawitch and Simon W. Moore},
  title = {Multithreading in Embedded Processors},
  booktitle = {IEE System-on-Chip Design, Test and Technology},
  publisher = {the IEE Society},
  month = {September},
  year = {2003}
}

Multithreading appears to be a feasible solution with enormous potential for embedded processors. The multithreaded model benefits from sequential characteristic of control-flow and concurrency characteristic of data-flow. Thread-level parallelism has a potential to overcome the limitations of insufficient instruction-level parallelism to hide the increasing memory latencies. Earlier empirical studies on multithreaded processors demonstrated that exploiting thread-level concurrency not only offers latency tolerance, but also provides predictable performance gain.

A MulTithreaded Embedded Processor (MulTEP) is designed to provide high performance thread-level parallelism, real-time characteristics, a flexible number of threads and low incremental cost per thread for the embedded system. In its architecture, a matching-store synchronisation mechanism allows a thread to wait for multiple data items. A tagged up/down dynamic-priority hardware scheduler is provided for real-time scheduling. Pre-loading, pre-fetching and colour-tagging techniques are implemented to allow context switches without any overhead. The architecture supports four additional multithreading instructions (i.e. spawn, wait, switch, stop) for programmers and advance compilers to create programs with low-overhead multithreaded operations.

Experimental results demonstrate that multithreading can be effectively used to improve performance and system utilisation. Latency operations that would otherwise stall the pipeline are hidden by the execution of the other threads. The hardware scheduler provides priority scheduling, which is suitable for real-time embedded applications.